The continuous shrinking in dimensions of electronic devices utilized in ULSI circuits in recent years has resulted in increasing the resistance of the BEOL metallization as well as increasing the capacitance of the intralayer and interlayer dielectrics (ILDs). This combined effect increases signal delays in ULSI electronic devices. In order to improve the switching performance of future ULSI circuits, low dielectric constant (k) insulators and particularly those with a dielectric constant k that is significantly lower than that of silicon oxide are needed to reduce the capacitance.
In recent years, polymers containing Si, C, O, and H such as methylsiloxane, methylsesquioxanes, and other organic and inorganic polymers have been typically used in applications for ULSI devices. For instance, materials described in a paper “Properties of new low dielectric constant spin-on silicon oxide based dielectrics” by N. Hacker et al., published in Mat. Res. Soc. Symp. Proc., vol. 476 (1997) p 25 appear to satisfy the thermal stability requirement, even though some of these materials propagate cracks easily when reaching thicknesses needed for integration in the interconnect structure when films are prepared by a spin-on technique.
Dielectrics made as both dense or porous forms of Si, C, O, H alloys (SiCOH) are commonly used in the interconnect structures of integrated circuits. U.S. Pat. Nos. 6,147,009, 6,312,793, and 6,479,110, for example, describe SiCOH materials that are made utilizing a plasma enhanced chemical vapor deposition (PECVD) process. The SiCOH materials may also be deposited by spin coating and other PECVD methods known in the art. Typically, but not necessarily always, such SiCOH materials are used as the interlevel or intralayer dielectric (ILD) in which one or more conductive features are embedded in.
When integrating the SiCOH materials, a new dielectric material is needed having a low etch rate in the reactive ion etching process used to etch the SiCOH material. A significant problem encountered in forming these BEOL interconnect structures with smaller and smaller dimensions is the etch selectivity is poor between the ILD layer comprised of Si, C, O, and H and the underlying layer. Routinely the layer under the ILD is a buried etch stop or is a Cu capping layer that consists of Si, N, C and H. The Cu capping layer is also known, in the art, as a dielectric barrier layer or an etch stop. It is noted that these etch stop and Cu capping layers typically contain 10-30% Si, and they are etched in a fluorine-based chemistry that is also used to etch the Si, C, O, H dielectric.
Another problem with prior art BEOL interconnect structures formed in a porous SiCOH dielectric is that a stop layer for chemical mechanical polishing (CMP) is used on top of the porous SiCOH dielectric, but in the prior art the CMP stop layer has a similar or identical composition to the porous SiCOH dielectric. In some integration schemes, it is desired that the CMP stop layer has the following properties (i) a very low etch rate (on the order of about 1-10 Å/sec, and more preferably 1 Å/sec or less) in a fluorine-based etching process, (ii) thermally and chemically stable, (iii) H2O resistant so that the water-based CMP slurry does not attack the material by stress-corrosion cracking, and (iv) a low removal rate in the CMP process used to remove metal during damascene integration of SiCOH and porous SiCOH dielectrics. By “thermally and chemically stable” it is meant that the dielectrics do not degrade or undergo any compositional change when processed at a temperature of about 400° C. By “low removal rate” it is meant that the rate of CMP removal is less than 100 nm/minute, and preferably 10-20 nm/minute. The low etch rate and low CMP rate requirements create a need for a thermally and chemically stable material with a chemical composition very different from SiCOH.
In view of the above, there is a need for providing composite alloy materials having a low dielectric constant (k of less than 4.0, preferably less than 3.0) with a high thermal and chemical stability that have a composition other than a SiCOH composition. The non-SiCOH composition should have a low thermal coefficient of expansion (CTE) on the order of about 10-30 ppm/° C. or less and a very low etch rate (on the order of about less than 10 Å/sec) in fluorine-based etching processes. A method of forming such a composite alloy material not including a SiCOH dielectric composition using conventional CVD tools is also needed.
In U.S. Application Publication No 2004/0130031 by Chen et al., methods (by CVD) to make new porous dielectric films using carboranes precursors are described. The carborane molecule or a chemical derivative of carborane is used and incorporated as an intact cage structure into a porous, low density, dielectric material suitable for use in the interconnect structures of integrated circuits. A mechanically robust, low dielectric constant film can be formed by chemical vapor deposition using carborane. The carborane cage forms a small pore or void, and may be a component of a film containing Si and O.